Conventional high-resolution analog-to-digital converters (“ADCs”), such as successive approximation and flash type converters, often do not make use of exceptionally high speeds achieved with a scaled VLSI technology. Many of these ADCs operate at the Nyquist rate (i.e., at a sampling frequency approximately equal to twice the maximum frequency in the input signal). Hence, they often require a complicated analog lowpass filter (often called an anti-aliasing filter) to limit the maximum frequency input to the ADC, and sample-and-hold circuitry.
Moreover, the performance of digital signal processing and communication systems in general is limited by the precision of the digital input signal which is achieved at the interface between analog and digital information.
Hence, sigma-delta analog-to-digital converters (“ADCs”) and digital-to-analog converters (“DACs”), generally referred to herein as sigma-delta modulators, are used in many applications wherein analog signals are to be converted to digital signals and vice versa. Sigma-delta modulators are often a cost effective alternative for many types of converters (e.g., high resolution converters) which can be ultimately integrated on digital signal processor ICs.
Sigma-delta modulators use a low resolution ADC (e.g., a 1-bit quantizer), noise shaping, and a very high oversampling rate. This high resolution can be achieved by a decimation (sample-rate reduction) process. Additional advantages of sigma-delta modulators include higher reliability, increased functionality, and reduced chip cost.